Thin film transistor substrate with bonding layer and method for fabricating the same

ABSTRACT

An exemplary thin film transistor substrate ( 30 ) includes a bas substrate ( 31 ) and a gate electrode ( 32 ) formed on the bas substrate. The gate electrode includes a bonding layer ( 321 ) formed on the bas substrate and an electrically conductive layer ( 322 ) formed on the bonding layer. The bonding layer includes one of aluminum oxide and zirconium dioxide.

FIELD OF THE INVENTION

The present invention relates to thin film transistor (TFT) substrates,and more particularly to a thin film transistor substrate for a liquidcrystal display and a method for fabricating the thin film transistorsubstrate.

GENERAL BACKGROUND

Typically, liquid crystal displays (LCDs) utilize thin film transistorsas switching elements. The liquid crystal display generally includes athin film transistor substrate, on which the thin film transistors areformed.

FIG. 14 is a cross-sectional view of part of a conventional thin filmtransistor substrate. The TFT substrate 10 includes a bas substrate 11,a gate electrode 12 formed on the bas substrate 11, a gate insulatinglayer 13 covering the gate electrode 12 and the bas substrate 11, anamorphous silicon (a-Si) layer 14 corresponding to the gate electrode 12and formed on the gate insulating layer 13, two impurity-doped a-Silayers 18 formed on the a-Si layer 14 and being generally opposite toeach other, a source electrode 15 formed on one of the impurity-dopeda-Si layers 18, a drain electrode 16 formed on the other impurity-dopeda-Si layer 18 and being generally opposite to the source electrode 15,and a passivation layer 17 covering the source electrode 15 and thedrain electrode 16.

The gate electrode 12 is made of copper (Cu) to minimizeresistance-capacitance (RC) delay caused by parasitic capacitors andparasitic resistors between the gate electrode 12 and a correspondinggate line (not shown). However, the adhesion strength between the coppergate electrode 12 and the bas substrate 11 is weak. As a result, thegate electrode 12 may desquamate from the bas substrate 11.

Referring also to FIG. 15, this is a cross-sectional view of part ofanother conventional thin film transistor substrate. The thin filmtransistor substrate 20 includes a bas substrate 21, and a gateelectrode 22 formed on the bas substrate 21. The gate electrode 22includes a barrier layer 223, a conductive layer 222, and a bondinglayer 221, disposed in that order from top to bottom. The bonding layer221 is formed on the bas substrate 21 and is made of molybdenum (Mo).The conductive layer 222 is made of copper.

The main constituent of the bas substrate 21 is silicon dioxide (SiO₂).Most metallic materials have weak adhesion with silicon dioxide.Typically, the adhesion strength between a metallic material and silicondioxide ranges from 0.5 joules per square meter (J/sq.m.) to 2 joulesper square meter. That is, the effect using molybdenum as a bondinglayer 221 to increase the adhesion strength between the gate electrode22 and the bas substrate 21 is limited. As a result, when the TFTsubstrate 20 sustains significant shock, the gate electrode 22 maydesquamate from the bas substrate 21.

What is needed, therefore, is a thin film transistor substrate and amethod for fabricating the thin film transistor that can overcome theabove-described deficiencies.

SUMMARY

A thin film transistor substrate includes a bas substrate and a gateelectrode formed on the bas substrate. The gate electrode includes abonding layer formed on the bas substrate and an electrically conductivelayer formed on the bonding layer. The bonding layer includes one ofaluminum oxide and zirconium dioxide.

A method for fabricating a thin film transistor substrate includes thefollowing steps: providing a bas substrate; forming a bonding layer, thebonding layer having one of aluminum oxide and zirconium dioxide on thebas substrate; forming a conductive layer and a photo-resistor layer onthe aluminum oxide layer or the zirconium dioxide layer; applying anexposing process on the photo-resistor layer through a mask anddeveloping the photo-resistor layer; etching the conductive layer; andashing the photo-resistor layer and so as to obtain a gate electrode onthe bas substrate.

Other novel features and advantages will become more apparent from thefollowing detailed description when taken in conjunction with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view of part of a thin film transistorsubstrate according to a first embodiment of the present invention.

FIGS. 2 to 5 are sectional views showing sequential steps in fabricatingthe thin film transistor substrate of FIG. 1 according to a method of anexemplary embodiment of the present invention.

FIG. 6 is a cross-sectional view of part of a thin film transistorsubstrate according to a second embodiment of the present invention.

FIG. 7 is a cross-sectional view of part of a thin film transistorsubstrate according to a third embodiment of the present invention.

FIGS. 8 to 13 are sectional views showing sequential steps infabricating the thin film transistor substrate of FIG. 7 according to amethod of an exemplary embodiment of the present invention.

FIG. 14 is a cross-sectional view of part of a conventional thin filmtransistor substrate.

FIG. 15 is a cross-sectional view of part of another conventional thinfilm transistor substrate.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Reference will now be made to the drawings to describe preferred andexemplary embodiments in detail.

FIG. 1 is a cross-sectional view of part of a thin film transistorsubstrate 30 according to a first embodiment of the present invention.The thin film transistor substrate 30 includes a bas substrate 31, and agate electrode 32 formed on the bas substrate 31. The gate electrode 32includes a barrier layer 323, an electrically conductive layer 322, anda bonding layer 321, disposed from top to bottom in that order.

The main constituent of the bas substrate 31 is silicon dioxide. Thebonding layer 321 is formed on the bas substrate 31. The bonding layer321 has a thickness in the range of 5 to 30 nanometers, and a preferredmaterial of the bonding layer 321 is aluminum oxide (Al₂O₃). Theconductive layer 322 has a thickness in the range of 200 to 400nanometers, and a preferred material of the conductive layer 322 iscopper. The barrier layer 323 has a thickness in the range of 5 to 30nanometers, and a preferred material of the barrier layer 323 istitanium nitride (TiN).

One surface of the bonding layer 321 contacts the bas substrate 31. Theadhesion strength between the aluminum oxide of the bonding layer 321and the silicon dioxide of the bas substrate 31 is about 48 joules persquare meter. The adhesion strength is sufficient to enable the bondinglayer 321 to be tightly attached to the bas substrate 31.

The other surface of the bonding layer 321 contacts the conductive layer322. Therefore, the bonding layer 321 and the conductive layer 322define an interface (not labeled) therebetween. Chemical reaction occursbetween the aluminum oxide of the bonding layer 321 and the copper ofthe conductive layer 322. That is, ionic bonds such as Cu—O ionic bondsand covalent bonds such as Cu—Al covalent bonds are formed at theinterface. The adhesion strength formed by the Cu—O ionic bonds and theCu—Al covalent bonds is sufficient. Therefore, the conductive layer 322is tightly attached to the bonding layer 321.

Referring to FIGS. 2 to 5, these are sectional views of sequential stepsin fabricating the thin film transistor substrate 30 according to amethod of an exemplary embodiment of the present invention. Forconvenience, unless the context indicates otherwise, the method isdescribed and shown only in relation to that part of the thin filmtransistor substrate 30 shown in FIG. 1. Firstly, as shown in FIG. 2,the substrate 31 is provided. Then, an aluminum oxide layer 351, acuprum layer 352, a titanium nitride layer 353, and a photo-resist (PR)layer 354 are deposited on the substrate 31 from bottom to top in thatorder. In the process of deposition of the aluminum oxide layer 351,oxygen is provided to enable the aluminum oxide layer 351 to be oxidizedsufficiently. As a result, more Cu—O ionic bonds are generated. Theoxygen flow rate may vary in a range from 5 to 15 standard cubiccentimeters per minute (sccm).

Subsequently, referring also to FIG. 3, a mask (not shown) is utilizedso as to define a predetermined pattern over the PR layer 354. Thereby,after an exposing and developing process, a PR pattern 355 is formedaccording to the mask and covers part of the titanium nitride layer 353.The PR pattern 355 is used as an etching mask.

Afterward, referring also to FIG. 4, uncovered portions of the titaniumnitride layer 353, the cuprum layer 352, and the aluminum oxide layer351 are etched away. Thereby, the remaining portions of the titaniumnitride layer 353, the cuprum layer 352, and the aluminum oxide layer351 cooperatively form the gate electrode 32 under the PR pattern 355.

Finally, referring also to FIG. 5, the PR pattern 355 is ashed so as toexpose the gate electrode 32.

The gate electrode 32 includes a barrier layer 323, a conductive layer322, and a bonding layer 321. The material of the bonding layer 321 isaluminum oxide, and the main constituent of the bas substrate 31 issilicon dioxide. Because the adhesion strength between the aluminumoxide and the silicon dioxide is about 48 joules per square meter, thebonding layer 321 is tightly attached to the bas substrate 31.

Furthermore, the Cu—O ionic bonds and the Cu—Al covalent bonds areformed at the interface of the bonding layer 321 and the conductivelayer 322. In the process of deposition of the aluminum oxide layer 351,oxygen is provided to generate more Cu—O ionic bonds. Because theadhesion strength formed by the Cu—O ionic bonds and the Cu—Al covalentbonds is sufficient, the conductive layer 322 is tightly attached to thebonding layer 321. Therefore, the conductive layer 322 is tightlyattached to the bas substrate 31 via the bonding layer 321. That is, thegate electrode 32 is tightly attached to the bas substrate 31.

FIG. 6 is a cross-sectional view of part of a thin film transistorsubstrate 40 according to a second embodiment of the present invention.The thin film transistor substrate 40 has a structure similar to that ofthe thin film transistor substrate 30. However, the thin film transistorsubstrate 40 includes a bas substrate 41, a bonding layer 421 coveringsubstantially all the bas substrate 41, and a gate electrode 42 formedon the bonding layer 421. A preferred material of the bonding layer 421is zirconium dioxide ZrO₂. The main constituent of the bas substrate 41is silicon dioxide.

The gate electrode 42 includes a conductive layer 422 formed on thebonding layer 421, and a barrier layer 423 formed on the conductivelayer 422. The conductive layer 422 has a thickness in the range of 200to 400 nanometers, and a material of the conductive layer 422 can be analloy of copper and molybdenum. The barrier layer 423 has a thickness inthe range of 5 to 30 nanometers, and a preferred material of the barrierlayer 423 is tantalum nitride TaN. The adhesion strength between thezirconium dioxide of the bonding layer 421 and the silicon dioxide ofthe bas substrate 41 is in the range of 53 joules per square meter to 79joules per square meter.

The A typical method for fabricating the thin film transistor substrate40 is similar to the above-described method for fabricating the thinfilm transistor substrate 30. However, in process of forming the gateelectrode 42, only the barrier layer 423 and the conductive layer 422are etched away, leaving the bonding layer 421 remaining on covering thebas substrate 41.

In this embodiment, only the barrier layer 423 and the conductive layer422 are etched away, with the bonding layer 421 remaining on the bassubstrate 41. This reduces the time needed to form the gate electrode42. Furthermore, the bonding layer 421 is made of zirconium dioxide. Thezirconium dioxide has stronger adhesion strength with the silicondioxide of the bas substrate 41. In addition, the bonding layer 421 hasa very large contact area with the bas substrate 41. Therefore, the gateelectrode 42 is attached to the bas substrate 41 very tightly via theexpansive bonding layer 421.

FIG. 7 is a cross-sectional view of part of a thin film transistorsubstrate 50 according to a third embodiment of the present invention.The thin film transistor substrate 50 has a structure similar to that ofthe thin film transistor substrate 30. However, a bonding layer 521includes a plurality of micro-grooves 5210 on a top surface thatcontacts a conductive layer 522.

Referring also to FIGS. 8 to 13, these are sectional views of sequentialsteps in fabricating the thin film transistor substrate 50 according toa method of an exemplary embodiment of the present invention. Forconvenience, unless the context indicates otherwise, the method isdescribed and shown only in relation to that part of the thin filmtransistor substrate 50 shown in FIG. 7. The method for fabricating thethin film transistor substrate 50 is similar to the above-describedmethod for fabricating the thin film transistor substrate 30. However,in process of depositing an aluminum oxide layer 551, a top surface ofthe aluminum oxide layer 551 is plasma-treated with ammonia so as toform the micro-grooves 5210. The ammonia flow rate is below 50 sccm, andthe environment temperature is below 300° Centigrade. Power forgenerating the ammonia plasma is below 500 watts.

In this embodiment, the bonding layer 521 includes a plurality ofmicro-grooves 5210 on the top surface that contacts the conductive layer522. This enlarges the contact area between the bonding layer 521 andthe conductive layer 522. Therefore, more Cu—O ionic bonds and Cu—Alcovalent bonds are formed at an interface of the bonding layer 521 andthe conductive layer 522. This increases the adhesion strength betweenthe conductive layer 522 and the bonding layer 521. Thus, a gateelectrode 52 having the bonding layer 521 and the conductive layer 522is attached to a bas substrate 51 more tightly.

Various modifications and alterations to the above-described embodimentsare possible. For example, the material of the conductive layer may bean alloy of copper and chromium (Cr) or an alloy of copper and tungsten(W). In another example, the material of the barrier layer may betungsten nitride (WN).

It is to be further understood that even though numerous characteristicsand advantages of the present embodiments have been set out in theforegoing description, together with details of the structures andfunctions of the embodiments, the disclosure is illustrative only, andchanges may be made in detail, especially in matters of shape, size, andarrangement of parts within the principles of the invention to the fullextent indicated by the broad general meaning of the terms in which theappended claims are expressed.

1. A thin film transistor substrate, comprising: a bas substrate; and agate electrode formed on the bas substrate, the gate electrodecomprising: a bonding layer formed on the bas substrate, the bondinglayer comprising one of aluminum oxide and zirconium dioxide; and anelectrically conductive layer formed on the bonding layer.
 2. The thinfilm transistor substrate as claimed in claim 1, wherein the bondinglayer comprises a plurality of micro-grooves on a surface thereofadjacent to the conductive layer.
 3. The thin film transistor substrateas claimed in claim 1, wherein the conductive layer comprises copper. 4.The thin film transistor substrate as claimed in claim 1, wherein theconductive layer comprises an alloy, which is a combination of copperand one of molybdenum, chromium, and tungsten.
 5. The thin filmtransistor substrate as claimed in claim 1, wherein the gate electrodefurther comprises a barrier layer formed on the conductive layer.
 6. Thethin film transistor substrate as claimed in claim 5, wherein thebarrier layer comprises one of titanium nitride, tantalum nitride, andtungsten nitride.
 7. The thin film transistor substrate as claimed inclaim 5, wherein the barrier layer has a thickness in the range from 5to 30 nanometers.
 8. The thin film transistor substrate as claimed inclaim 1, wherein the bonding layer has a thickness in the range from 5to 30 nanometers.
 9. The thin film transistor substrate as claimed inclaim 1, wherein the conductive layer has a thickness in the range from200 to 400 nanometers.
 10. The thin film transistor substrate as claimedin claim 1, wherein the bonding layer is an aluminum oxide layer. 11.The thin film transistor substrate as claimed in claim 10, wherein anadhesion strength between the bonding layer and the bas substrate isabout 48 joules per square meter.
 12. The thin film transistor substrateas claimed in claim 1, wherein the bonding layer is a zirconium dioxidelayer.
 13. The thin film transistor substrate as claimed in claim 12,wherein an adhesion strength between the bonding layer and the bassubstrate is in the range from 53 joules per square meter to 79 joulesper square meter.
 14. The thin film transistor substrate as claimed inclaim 1, wherein the bonding layer covers substantially the whole bassubstrate.
 15. A method for fabricating a thin film transistorsubstrate, the method comprising: providing a bas substrate; forming abonding layer on the bas substrate, the bonding layer comprising one ofaluminum oxide and zirconium dioxide; forming a conductive layer and aphoto-resistor layer on the bonding layer; applying an exposing processon the photo-resistor layer through a mask and developing thephoto-resistor layer; etching the conductive layer; and ashing thephoto-resistor layer and so as to obtain a gate electrode on the bassubstrate.
 16. The method as claimed in the claim 15, wherein a surfaceof the bonding layer is plasma-treated to form a plurality ofmicro-grooves thereon.
 17. The method as claimed in the claim 16,wherein the surface of the bonding layer is plasma-treated with ammonia.18. The method as claimed in the claim 17, wherein during theplasma-treatment with ammonia, a flow rate of ammonia is below 50standard cubic centimeters per minute.
 19. The method as claimed in theclaim 15, wherein when the bonding layer is formed on the bas substrate,oxygen is provided.
 20. The method as claimed in the claim 19, wherein aflow rate of the oxygen is in the range from 5 to 15 standard cubiccentimeters per minute.